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20 lines
263 B

[tasks]
flag_check
[options]
mode prove
depth 30
[engines]
abc pdr
[script]
verific -vhdl TestDesign.vhd
verific -sv Properties.sv
verific -import -extnets -all TestDesign
prep -top TestDesign
setundef -anyseq -undriven
[files]
Properties.sv
TestDesign.vhd