From 1ebfafd654772b5f4f1a3b54d17c9ff01628a621 Mon Sep 17 00:00:00 2001
From: tmeissner <programming@goodcleanfun.de>
Date: Tue, 8 Feb 2022 15:39:46 +0100
Subject: [PATCH] Switch to submodule repos instead of local clones

---
 .gitignore     | 2 --
 README.md      | 6 ++++++
 env-setup.sh   | 8 --------
 tests/Makefile | 9 ++++++---
 4 files changed, 12 insertions(+), 13 deletions(-)

diff --git a/.gitignore b/.gitignore
index 1809249..66bed3b 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1,3 +1 @@
-cryptocores
-libvhdl
 cocotbext-wishbone
diff --git a/README.md b/README.md
index 7127dc1..fe5b7d9 100644
--- a/README.md
+++ b/README.md
@@ -15,6 +15,12 @@ Have fun!
 
 ## Quickstart guide
 
+### Dependencies
+*cocotb_with_ghdl* uses external libraries to get the components to verify. They are shipped as git submodules. You have to use the `--recursive` option when clone
+the *cocotb_with_ghdl* repository to get them: `git clone --recursive https://git.goodcleanfun.de/tmeissner/cocotb_with_ghdl`
+
+Another useful tool is GTKWave, install it if you want to use the waveform files generated by some of the tests.
+
 
 ### Change into docker container & install requirements
 ```
diff --git a/env-setup.sh b/env-setup.sh
index d1dab61..38e78d9 100755
--- a/env-setup.sh
+++ b/env-setup.sh
@@ -5,11 +5,3 @@ if [ ! -d cocotbext-wishbone/.git ]; then
   cd cocotbext-wishbone && patch < ../setup.py.patch
   cd ..
 fi
-
-if [ ! -d libvhdl/.git ]; then
-  git clone https://github.com/tmeissner/libvhdl.git
-fi
-
-if [ ! -d cryptocores/.git ]; then
-  git clone https://github.com/tmeissner/cryptocores.git
-fi
diff --git a/tests/Makefile b/tests/Makefile
index 441ece8..9541b9e 100644
--- a/tests/Makefile
+++ b/tests/Makefile
@@ -1,6 +1,9 @@
 # Default test
 DUT ?= uarttx
 
+# Path to ext deps
+EXT := ../ext
+
 ifeq (${DUT}, wishbone)
   TOPLEVEL := wishboneslavee
   SIM_ARGS := -gSimulation=true \
@@ -13,9 +16,9 @@ endif
 # Simulator (GHDL) & RTL related
 SIM                  := ghdl
 TOPLEVEL_LANG        := vhdl
-VHDL_SOURCES_libvhdl := ../libvhdl/common/UtilsP.vhd
-VHDL_SOURCES         := ../libvhdl/syn/*.vhd \
-  ../cryptocores/aes/rtl/vhdl/*.vhd
+VHDL_SOURCES_libvhdl := ${EXT}/libvhdl/common/UtilsP.vhd
+VHDL_SOURCES         := ${EXT}/libvhdl/syn/*.vhd \
+  ${EXT}/cryptocores/aes/rtl/vhdl/*.vhd
 SIM_BUILD            := work
 COMPILE_ARGS         := --std=08
 SIM_ARGS             += \