From 3ff9e3e26943318e7215b3ba64a589b3a3e15d3c Mon Sep 17 00:00:00 2001 From: Torsten Meissner Date: Tue, 13 Mar 2012 17:08:54 +0100 Subject: [PATCH] New verily top level file of DES algorithm --- des/rtl/verilog/des.v | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 des/rtl/verilog/des.v diff --git a/des/rtl/verilog/des.v b/des/rtl/verilog/des.v new file mode 100644 index 0000000..4f23c0d --- /dev/null +++ b/des/rtl/verilog/des.v @@ -0,0 +1,36 @@ +// ====================================================================== +// DES encryption/decryption +// algorithm according to FIPS 46-3 specification +// Copyright (C) 2012 Torsten Meissner +//----------------------------------------------------------------------- +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +// ====================================================================== + + + + +module des ( + input reset_i, // async reset + input clk_i, // clock + input mode_i, // des-modus: 0 = encrypt, 1 = decrypt + input [0:63] key_i, // key input + input [0:63] data_i, // data input + input valid_i, // input key/data valid flag + output reg [0:63] data_o, // data output + output reg valid_o // output data valid flag + ); + + +endmodule