From 325a08f3013c5fabacb27b56ab175db0d2005318 Mon Sep 17 00:00:00 2001 From: umarcor Date: Fri, 27 Nov 2020 03:24:17 +0100 Subject: [PATCH 1/3] aes: fix VHDL sources order --- aes/sim/vhdl/Makefile | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/aes/sim/vhdl/Makefile b/aes/sim/vhdl/Makefile index 0ce8dc9..99d93b7 100644 --- a/aes/sim/vhdl/Makefile +++ b/aes/sim/vhdl/Makefile @@ -20,9 +20,10 @@ RTL_SRC := \ ../../rtl/vhdl/aes_pkg.vhd \ - ../../rtl/vhdl/aes.vhd \ ../../rtl/vhdl/aes_enc.vhd \ - ../../rtl/vhdl/aes_dec.vhd + ../../rtl/vhdl/aes_dec.vhd \ + ../../rtl/vhdl/aes.vhd + SIM_SRC := tb_aes.vhd C_SRC := tb_aes.c From 6ebfd4afe79cb4dd109eed97c63ddba004d0ace5 Mon Sep 17 00:00:00 2001 From: umarcor Date: Fri, 27 Nov 2020 03:24:41 +0100 Subject: [PATCH 2/3] aes: fix build arg order --- aes/sim/vhdl/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/aes/sim/vhdl/Makefile b/aes/sim/vhdl/Makefile index 99d93b7..b75a86e 100644 --- a/aes/sim/vhdl/Makefile +++ b/aes/sim/vhdl/Makefile @@ -73,7 +73,7 @@ tb_aes: ${RTL_SRC} ${SIM_SRC} ${C_SRC} osvvm/OsvvmContext.o | work @echo "Analyze testbench & design ..." ghdl -a --std=$(VHD_STD) -fpsl --workdir=work -P=osvvm ${RTL_SRC} ${SIM_SRC} @echo "Elaborate testbench & design ..." - ghdl -e --std=$(VHD_STD) -fpsl --workdir=work -P=osvvm -Wl,-lcrypto -Wl,-lssl -Wl,$@.c $@ + ghdl -e --std=$(VHD_STD) -fpsl --workdir=work -P=osvvm -Wl,$@.c -Wl,-lcrypto -Wl,-lssl $@ tb_aes.ghw: tb_aes From d7b39f322e4d4e8f9feed20d6d92c01a658cc757 Mon Sep 17 00:00:00 2001 From: umarcor Date: Fri, 27 Nov 2020 03:30:11 +0100 Subject: [PATCH 3/3] ci: add GitHub Actions workflow 'test' --- .github/test.sh | 17 ++++++++++++ .github/workflows/test.yml | 57 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 74 insertions(+) create mode 100755 .github/test.sh create mode 100644 .github/workflows/test.yml diff --git a/.github/test.sh b/.github/test.sh new file mode 100755 index 0000000..184bbad --- /dev/null +++ b/.github/test.sh @@ -0,0 +1,17 @@ +#!/usr/bin/env sh + +set -e + +cd $(dirname "$0")/.. + +run_sim() { + echo "::group::Test $1" + cd "$1"/sim/vhdl + $MAKE sim + cd ../../.. + echo '::endgroup::' +} + +for item in aes cbcdes cbcmac_des cbctdes des tdes; do + run_sim $item +done diff --git a/.github/workflows/test.yml b/.github/workflows/test.yml new file mode 100644 index 0000000..aa591a3 --- /dev/null +++ b/.github/workflows/test.yml @@ -0,0 +1,57 @@ +name: 'test' + +on: + push: + pull_request: + +jobs: + + + lin: + runs-on: ubuntu-latest + steps: + + - uses: actions/checkout@v2 + with: + submodules: recursive + + - name: Install dependencies + run: | + sudo apt update -qq + sudo apt install -y libssl-dev + + - uses: ghdl/setup-ghdl-ci@master + with: + backend: llvm + + - run: ./.github/test.sh + env: + MAKE: make + + + win: + runs-on: windows-latest + defaults: + run: + shell: msys2 {0} + steps: + + - uses: msys2/setup-msys2@v2 + with: + msystem: MINGW64 + update: true + install: > + mingw-w64-x86_64-make + mingw-w64-x86_64-ghdl-llvm + mingw-w64-x86_64-openssl + + - run: git config --global core.autocrlf input + shell: bash + + - uses: actions/checkout@v2 + with: + submodules: recursive + + - run: ./.github/test.sh + env: + MAKE: mingw32-make