From eb0d52e2d6ee7482c61e983557ba58b57da070bb Mon Sep 17 00:00:00 2001 From: tmeissner Date: Fri, 23 Dec 2022 16:51:46 +0100 Subject: [PATCH] Add blink design info and more links to README --- README.md | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/README.md b/README.md index 0a934fb..72a06d6 100644 --- a/README.md +++ b/README.md @@ -1,8 +1,16 @@ # gatemate_experiments -Ongoing experiments with the Cologne Chip's GateMate FPGA architecture. +Ongoing experiments with the Cologne Chip's GateMate FPGA architecture. All experiments are done with teh GateMate FPGA Starter (Eval) Kit. + +## Designs + +### blink + +Simple design which should display incrementing binary numbers with LED1-LED8 of the GateMate FPGA Starter Kit. It uses *CC_PLL* & *CC_CFG_END* primitives of the GateMate FPGA. ## Further Ressources * [GateMate FPGA](https://www.colognechip.com/programmable-logic/gatemate) * [GateMate FPGA Eval Board](https://www.colognechip.com/programmable-logic/gatemate-evaluation-board) +* [GHDL VHDL Simulation & Synthesis](https://github.com/ghdl/ghdl) +* [Yosys Synthesis Suite](https://github.com/YosysHQ/yosys)