From 97b6596e830523c228db47c8785e813d6729168d Mon Sep 17 00:00:00 2001 From: tmeissner Date: Sat, 15 Nov 2014 02:47:11 +0100 Subject: [PATCH] add test for ascending slv; add info about successfully finished simulation --- test/StringT.vhd | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/test/StringT.vhd b/test/StringT.vhd index 163ed5f..5358e03 100644 --- a/test/StringT.vhd +++ b/test/StringT.vhd @@ -19,10 +19,13 @@ begin StringTestP : process is - variable v_data : std_logic_vector(31 downto 0) := x"DEADBEEF"; + variable v_data : std_logic_vector(31 downto 0) := x"DEADBEEF"; + variable v_data_reverse : std_logic_vector(0 to 31) := x"DEADBEEF"; begin assert_equal(to_string(v_data(0)), "1"); assert_equal(to_string(v_data), "11011110101011011011111011101111"); + assert_equal(to_string(v_data_reverse), "11011110101011011011111011101111"); + report "INFO: StringP tests finished successfully"; wait; end process StringTestP;