diff --git a/sim/StackP.vhd b/sim/StackP.vhd index a518e69..5ce8c7f 100644 --- a/sim/StackP.vhd +++ b/sim/StackP.vhd @@ -1,24 +1,25 @@ library ieee; use ieee.std_logic_1164.all; ---+ including vhdl 2008 libraries ---+ These lines can be commented out when using ---+ a simulator with built-in VHDL 2008 support ---library ieee_proposed; --- use ieee_proposed.standard_additions.all; --- use ieee_proposed.std_logic_1164_additions.all; package StackP is + generic ( + type STACK_TYPE; + MAX_LEN : natural := 64; + function to_string(d : in STACK_TYPE) return string + ); + -- linked list stack interface type t_stack is protected - procedure push (data : in std_logic_vector); - procedure pop (data : inout std_logic_vector); + procedure push (data : in STACK_TYPE); + procedure pop (data : inout STACK_TYPE); procedure init (logging : in boolean := false); impure function is_empty return boolean; + impure function is_full return boolean; impure function fillstate return natural; end protected t_stack; @@ -37,7 +38,7 @@ package body StackP is type t_entry; type t_entry_ptr is access t_entry; - type t_data_ptr is access std_logic_vector; + type t_data_ptr is access STACK_TYPE; type t_entry is record data : t_data_ptr; @@ -52,32 +53,38 @@ package body StackP is -- write one entry into queue by -- creating new entry at head of list - procedure push (data : in std_logic_vector) is + procedure push (data : in STACK_TYPE) is variable v_entry : t_entry_ptr; begin - if (v_count /= 0) then - v_entry := new t_entry; - v_entry.data := new std_logic_vector'(data); - v_entry.last_entry := v_head; - v_entry.next_entry := null; - v_head := v_entry; - v_head.last_entry.next_entry := v_head; + if (not(is_full)) then + if (v_count /= 0) then + v_entry := new t_entry; + v_entry.data := new STACK_TYPE'(data); + v_entry.last_entry := v_head; + v_entry.next_entry := null; + v_head := v_entry; + v_head.last_entry.next_entry := v_head; + else + v_head := new t_entry; + v_head.data := new STACK_TYPE'(data); + v_head.last_entry := null; + v_head.next_entry := null; + v_tail := v_head; + end if; + v_count := v_count + 1; + if v_logging then + report t_stack'instance_name & " pushed 0x" & to_string(data) & " on stack"; + end if; else - v_head := new t_entry; - v_head.data := new std_logic_vector'(data); - v_head.last_entry := null; - v_head.next_entry := null; - v_tail := v_head; - end if; - v_count := v_count + 1; - if v_logging then - report t_stack'instance_name & " pushed 0x" & to_hstring(data) & " on stack"; + assert false + report t_stack'instance_name & " push to full stack -> discared" + severity warning; end if; end procedure push; -- read one entry from queue at tail of list and -- delete that entry from list after read - procedure pop (data : inout std_logic_vector) is + procedure pop (data : inout STACK_TYPE) is variable v_entry : t_entry_ptr := v_head; begin assert not(is_empty) @@ -89,7 +96,7 @@ package body StackP is deallocate(v_entry); v_count := v_count - 1; if v_logging then - report t_stack'instance_name & " popped 0x" & to_hstring(data) & " from stack"; + report t_stack'instance_name & " popped 0x" & to_string(data) & " from stack"; end if; end procedure pop; @@ -104,6 +111,12 @@ package body StackP is return v_head = null; end function is_empty; + -- returns true if queue is full, false otherwise + impure function is_full return boolean is + begin + return v_count = MAX_LEN; + end function is_full; + -- returns number of filled slots in queue impure function fillstate return natural is begin diff --git a/test/StackT.vhd b/test/StackT.vhd index bf6acaa..e02482d 100644 --- a/test/StackT.vhd +++ b/test/StackT.vhd @@ -2,20 +2,11 @@ library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; ---+ including vhdl 2008 libraries ---+ These lines can be commented out when using ---+ a simulator with built-in VHDL 2008 support ---library ieee_proposed; --- use ieee_proposed.standard_additions.all; --- use ieee_proposed.std_logic_1164_additions.all; --- use ieee_proposed.numeric_std_additions.all; - library osvvm; use osvvm.RandomPkg.all; library libvhdl; use libvhdl.AssertP.all; - use libvhdl.StackP.all; @@ -29,9 +20,14 @@ architecture sim of StackT is constant C_STACK_DEPTH : natural := 64; - type t_scoreboard is array (natural range <>) of std_logic_vector(7 downto 0); + package SlvStack is new libvhdl.StackP + generic map ( + STACK_TYPE => std_logic_vector(63 downto 0), + MAX_LEN => C_STACK_DEPTH, + to_string => to_hstring + ); - shared variable sv_stack : t_stack; + shared variable sv_stack : SlvStack.t_stack; begin @@ -45,21 +41,30 @@ begin StackTestP : process is - variable v_data : std_logic_vector(7 downto 0); + variable v_data : std_logic_vector(63 downto 0); + variable v_random : RandomPType; + type t_scoreboard is array (natural range <>) of std_logic_vector(63 downto 0); + variable v_scoreboard : t_scoreboard(0 to C_STACK_DEPTH-1); begin - -- check initial emptiness + -- Check initial emptiness assert_true(sv_stack.is_empty, "Stack should be empty!"); + -- Fill stack + v_random.InitSeed(v_random'instance_name); for i in 0 to C_STACK_DEPTH-1 loop - sv_stack.push(std_logic_vector(to_unsigned(i, 8))); + v_data := v_random.RandSlv(64); + v_scoreboard(i) := v_data; + sv_stack.push(v_data); end loop; - -- check that it's full + -- Check that it's full + assert_true(sv_stack.is_full, "Stack should be full!"); + -- Check number of entries assert_equal(sv_stack.fillstate, C_STACK_DEPTH, "Stack should have" & integer'image(C_STACK_DEPTH) & "entries"); - -- empty the queue + -- Empty the stack for i in C_STACK_DEPTH-1 downto 0 loop sv_stack.pop(v_data); - assert_equal(v_data, std_logic_vector(to_unsigned(i, 8))); + assert_equal(v_data, v_scoreboard(i)); end loop; - -- check emptiness + -- Check emptiness assert_true(sv_stack.is_empty, "Stack should be empty!"); report "INFO: t_stack test finished successfully"; wait; diff --git a/test/get_vhdl_2008.sh b/test/get_vhdl_2008.sh deleted file mode 100755 index 5b0c89a..0000000 --- a/test/get_vhdl_2008.sh +++ /dev/null @@ -1,13 +0,0 @@ -#!/bin/bash - -rm -rf vhdl_2008/*.vhdl -cd vhdl_2008 - -wget http://www.eda.org/fphdl/standard_additions_c.vhdl -wget http://www.eda.org/fphdl/env_c.vhdl -wget http://www.eda.org/fphdl/standard_textio_additions_c.vhdl -wget http://www.eda.org/fphdl/std_logic_1164_additions.vhdl -wget http://www.eda.org/fphdl/numeric_std_additions.vhdl -wget http://www.eda.org/fphdl/numeric_std_unsigned_c.vhdl - -patch < env_c.vhdl.patch