diff --git a/issues/issue_1372.vhd b/issues/issue_1372.vhd
index 7c9904d..4dcc5ae 100644
--- a/issues/issue_1372.vhd
+++ b/issues/issue_1372.vhd
@@ -16,7 +16,6 @@ vunit issue_vunit (issue(psl)) {
 
 library ieee;
   use ieee.std_logic_1164.all;
-  use ieee.numeric_std.all;
 
 
 entity issue is
@@ -28,19 +27,8 @@ end entity issue;
 
 architecture psl of issue is
 
-  component sequencer is
-    generic (
-      seq : string
-    );
-    port (
-      clk  : in  std_logic;
-      data : out std_logic
-    );
-  end component sequencer;
-
   signal a, b : std_logic := '1';
 
 begin
 
-
 end architecture psl;