From 3fb359b26d2d736036790d8def72fd965f5460f8 Mon Sep 17 00:00:00 2001 From: tmeissner Date: Thu, 4 Dec 2014 21:07:43 +0100 Subject: [PATCH] initial commit of new project raspiFpga which uses the PIF FPGA board von bugblat --- raspiFpga/src/RaspiFpgaE.vhd | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 raspiFpga/src/RaspiFpgaE.vhd diff --git a/raspiFpga/src/RaspiFpgaE.vhd b/raspiFpga/src/RaspiFpgaE.vhd new file mode 100644 index 0000000..b07a12a --- /dev/null +++ b/raspiFpga/src/RaspiFpgaE.vhd @@ -0,0 +1,28 @@ +library ieee; + use ieee.std_logic_1164.all; + use ieee.numeric_std.all; + +library machxo2; + use machxo2.components.all; + + + +entity RaspiFpgaE is + port ( + --+ SPI slave if + SpiSclk_i : in std_logic; + SpiSte_i : in std_logic; + SpiMosi_i : in std_logic; + SpiMiso_o : out std_logic + ); +end entity RaspiFpgaE; + + + +architecture rtl of RaspiFpgaE is + + +begin + + +end architecture rtl; \ No newline at end of file