T. Meissner tmeissner
  • Dresden, Germany
  • Joined on Oct 22, 2018
libvhdl
VHDL 0 0

Library of reusable VHDL components

Updated 2 years ago

openscad
OpenSCAD 0 0

openSCAD models for 3d-printing

Updated 12 months ago

cryptocores
VHDL 0 0

cryptography ip-cores in vhdl / verilog

Updated 3 years ago

Examples and design pattern for VHDL verification

Updated 6 years ago

Learning by doing: Reading books and trying to understand the (code) examples

Updated 6 years ago

Various projects using Raspberry Pi

Updated 6 years ago

Web page of meissner-wohnen.de

Updated 4 years ago

dvb-webapp
JavaScript 0 0

Some experiments with web applications

Updated 6 years ago

Updated 6 years ago

usb-avr-cpld
Makefile 0 0

usb-avr-cpld experiment board with FTDI FT232RL, ATMEGA88 & XC9572XL

Updated 6 years ago

Updated 6 years ago

Tutorials from Pebble developer website

Updated 6 years ago

flasky
Python 0 0

Updated 5 years ago

Trying to verify Verilog/VHDL designs with formal methods and tools

Updated 3 weeks ago

bug_reports
VHDL 0 0

Updated 5 years ago