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@ -73,7 +73,7 @@ tb_aes: ${RTL_SRC} ${SIM_SRC} ${C_SRC} osvvm/OsvvmContext.o | work |
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@echo "Analyze testbench & design ..." |
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@echo "Analyze testbench & design ..." |
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ghdl -a --std=$(VHD_STD) -fpsl --workdir=work -P=osvvm ${RTL_SRC} ${SIM_SRC} |
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ghdl -a --std=$(VHD_STD) -fpsl --workdir=work -P=osvvm ${RTL_SRC} ${SIM_SRC} |
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@echo "Elaborate testbench & design ..." |
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@echo "Elaborate testbench & design ..." |
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ghdl -e --std=$(VHD_STD) -fpsl --workdir=work -P=osvvm -Wl,-lcrypto -Wl,-lssl -Wl,$@.c $@ |
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ghdl -e --std=$(VHD_STD) -fpsl --workdir=work -P=osvvm -Wl,$@.c -Wl,-lcrypto -Wl,-lssl $@ |
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tb_aes.ghw: tb_aes |
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tb_aes.ghw: tb_aes |
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