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cryptocores
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cryptography ip-cores in vhdl / verilog
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Torsten Meissner 4b41ea24dd dasdsad 12 years ago
aes move vhdl simulation files into correspondent subdirectory vhdl 12 years ago
cbcdes remove OVL support in older, finished & verified projects 12 years ago
cbctdes remove OVL support in older, finished & verified projects 12 years ago
des/sim dasdsad 12 years ago
tdes remove OVL support in older, finished & verified projects 12 years ago