8 Commits (1ef9d692c8ad53bfb34f45024507e892e1ff8415)

Author SHA1 Message Date
  T. Meissner 1ef9d692c8 Minor updates to README file 4 years ago
  T. Meissner d94585cad8 Making counter design work with GHDL synthesis 4 years ago
  T. Meissner 996bec1d87 Add short informations about the ghdl-synth branch 4 years ago
  T. Meissner b8a39e9106 Update link to git repo 5 years ago
  T. Meissner 1deb6e9789 Add vai_reg to README; using SVA default clocking 5 years ago
  T. Meissner 6d230226f2 Add info about git repo 6 years ago
  T. Meissner 2f7959db61 Remove gitignore from alu folder; added link to Yosys 6 years ago
  T. Meissner 4feec0fff6 Inital commit 6 years ago