No Description

Properties.sv 499B

12345678910111213141516171819202122232425262728293031323334353637
  1. module Properties (
  2. // global
  3. input clk,
  4. input resetn,
  5. input [1:0] sel,
  6. input [3:0] we
  7. );
  8. // Constrain reset
  9. reg init_flag = 1;
  10. always @(*) begin
  11. if (init_flag) assume (!resetn);
  12. if (!init_flag) assume (resetn);
  13. end
  14. always @(posedge clk)
  15. init_flag <= 0;
  16. default clocking
  17. @(posedge clk);
  18. endclocking
  19. default disable iff (!resetn);
  20. assert property (we[0] |=> sel == 0);
  21. endmodule
  22. bind TestDesign Properties i_Properties (.*);