Updated 3 weeks ago

openSCAD models for 3d-printing

Updated 8 months ago

Updated 10 months ago

Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)

Updated 10 months ago

Library of reusable VHDL components

Updated 2 years ago

Examples of using cocotb for functional verification of VHDL designs with GHDL.

Updated 2 years ago

Updated 2 years ago

Trying to verify Verilog/VHDL designs with formal methods and tools

Updated 2 years ago

Updated 3 years ago

cryptography ip-cores in vhdl / verilog

Updated 3 years ago

Exercises & activities from the go workshop provided by Packt: https://courses.packtpub.com/courses/go

Updated 3 years ago

Various Arduino related stuff

Updated 3 years ago

Web page of meissner-wohnen.de

Updated 4 years ago

(Somewhat adapted) code and solutions from the book "Build Your Own Lisp"

Updated 5 years ago

Updated 5 years ago

Updated 5 years ago

Examples and design pattern for VHDL verification

Updated 5 years ago

Tutorials from Pebble developer website

Updated 5 years ago

Updated 5 years ago

usb-avr-cpld experiment board with FTDI FT232RL, ATMEGA88 & XC9572XL

Updated 5 years ago