Updated 5 hours ago

Exercises & activities from the go workshop provided by Packt: https://courses.packtpub.com/courses/go

Updated 2 days ago

Trying to verify Verilog/VHDL designs with formal methods and tools

Updated 2 days ago

Library of reusable VHDL components

Updated 1 week ago

cryptography ip-cores in vhdl / verilog

Updated 2 weeks ago

Various Arduino related stuff

Updated 1 month ago

Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)

Updated 1 month ago

Web page of meissner-wohnen.de

Updated 2 months ago

(Somewhat adapted) code and solutions from the book "Build Your Own Lisp"

Updated 1 year ago

Updated 1 year ago

Updated 1 year ago

openSCAD models for 3d-printing

Updated 1 year ago

Examples and design pattern for VHDL verification

Updated 1 year ago

Tutorials from Pebble developer website

Updated 1 year ago

Updated 1 year ago

usb-avr-cpld experiment board with FTDI FT232RL, ATMEGA88 & XC9572XL

Updated 1 year ago

Updated 1 year ago

Some experiments with web applications

Updated 1 year ago

Various projects using Raspberry Pi

Updated 1 year ago

Learning by doing: Reading books and trying to understand the (code) examples

Updated 1 year ago