tmeissner
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lfd111x_building_a_risc-v-cpu_core
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T. Meissner 10ce6d9d74 Add GHA workflow for simulation of VHDL design 3 years ago
.github/workflows Add GHA workflow for simulation of VHDL design 3 years ago
tlv Final RISC-V code in TL-Verilog 3 years ago
vhdl Add synthesis target 3 years ago
README.md Add GHA workflow for simulation of VHDL design 3 years ago

README.md

tests

The original repository is located on my own git-server at https://git.goodcleanfun.de/tmeissner/lfd111x_building_a_risc-v-cpu_core

It is mirrored to github with every push, so both should be in sync.

lfd111x_building_a_risc-v-cpu_core

Code from the Linux Foundation course Building a RISC-V CPU Core at edX. I have added VHDL implementations equivalent to the TL-Verilog ones.