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@ -12,7 +12,6 @@ date: February 2022 |
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* Introduction |
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* Introduction |
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* Functional Verification |
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* Functional Verification |
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* Co-Simulation |
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* Co-Simulation |
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* Cocotb |
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* Cocotb |
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@ -89,7 +88,7 @@ date: February 2022 |
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- VHDL Procedural Interface (VHPI) |
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- VHDL Procedural Interface (VHPI) |
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- Verilog Procedural Interface (VPI) |
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- Verilog Procedural Interface (VPI) |
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- Propitrary interfaces (FLI) |
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- Proprietary interfaces (FLI) |
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- Access data in VHDL models in the simulator |
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- Access data in VHDL models in the simulator |
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## Features |
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## Features |
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@ -111,7 +110,7 @@ HDL testbench controls program flow |
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- Verifying HDL designs with Python |
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- Verifying HDL designs with Python |
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- HDL normally only used for design, not the testbench |
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- HDL normally only used for design, not the testbench |
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- Simulator only used to execute DUT RTL description |
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- Simulator only used to execute DUT RTL description |
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- Support many simulators (Free & propitrary) |
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- Supports many simulators (Free & proprietary) |
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- Free & open-source, active community |
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- Free & open-source, active community |
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## |
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## |
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@ -235,7 +234,7 @@ async def test_aes_enc(dut): |
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# Cocotb Triggers |
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# Cocotb Triggers |
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- Indicate when cocotb scheduler should resume coroutine execution |
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- Indicate when cocotb scheduler should resume coroutine execution |
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- Triggers should awaited for by coroutines |
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- Triggers should be awaited by coroutines |
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- Cause execution of the current coroutine to pause |
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- Cause execution of the current coroutine to pause |
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- Execution of paused coroutine will resumes when trigger fires |
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- Execution of paused coroutine will resumes when trigger fires |
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- Triggers for simulator events, task synchronization etc. |
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- Triggers for simulator events, task synchronization etc. |
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@ -256,18 +255,18 @@ t2 = Timer(15, units='ns') |
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t_ret = await First(t1, t2) # returns after 10 ns simulation time |
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t_ret = await First(t1, t2) # returns after 10 ns simulation time |
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~~~~ |
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~~~~ |
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# Cocotb Example: Verifying an UART transmitter |
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# Cocotb Example: Verifying a UART transmitter |
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![](images/cocotb_uarttx.png) |
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![](images/cocotb_uarttx.png) |
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# Cocotb Example: Verifying an UART transmitter |
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# Cocotb Example: Verifying a UART transmitter |
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## |
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## |
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![](images/vai_uart_wave.png) |
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![](images/vai_uart_wave.png) |
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# Cocotb Example: Verifying an UART transmitter |
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# Cocotb Example: Verifying a UART transmitter |
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## Valid-Accept Driver Model |
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## Valid-Accept Driver Model |
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@ -295,7 +294,7 @@ async def send(self, data, sync=True): |
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self._valid.value = 0 |
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self._valid.value = 0 |
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~~~~ |
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~~~~ |
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# Cocotb Example: Verifying an UART transmitter |
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# Cocotb Example: Verifying a UART transmitter |
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## UART Receiver Model |
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## UART Receiver Model |
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@ -324,7 +323,7 @@ async def receive(self): |
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return self._rec |
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return self._rec |
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~~~~ |
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# Cocotb Example: Verifying an UART transmitter |
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# Cocotb Example: Verifying a UART transmitter |
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## Test function |
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## Test function |
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@ -351,7 +350,7 @@ async def test_uarttx(dut): |
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assert rec == i, "UART sent data was incorrect on the {}th cycle".format(i) |
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assert rec == i, "UART sent data was incorrect on the {}th cycle".format(i) |
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~~~~ |
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~~~~ |
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# Cocotb Example: Verifying an UART transmitter |
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# Cocotb Example: Verifying a UART transmitter |
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~~~~ {.shell .stretch} |
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~~~~ {.shell .stretch} |
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loading VPI module '/usr/local/lib/python3.9/dist-packages/cocotb/libs/libcocotbvpi_ghdl.so' |
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loading VPI module '/usr/local/lib/python3.9/dist-packages/cocotb/libs/libcocotbvpi_ghdl.so' |
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@ -392,7 +391,7 @@ VPI module loaded! |
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- Verification libraries |
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- Verification libraries |
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- pyuvm |
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- pyuvm |
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- cocotb-coverage |
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- cocotb-coverage |
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- umv-python |
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- uvm-python |
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- Depending on cocotb |
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- Depending on cocotb |
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## Python generic |
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## Python generic |
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@ -443,12 +442,12 @@ class my_cr(): |
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- Easy to use |
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- Easy to use |
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- Good documentation |
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- Good documentation |
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- In active development with regularly releases |
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- In active development with regular releases |
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- Free and open-source |
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- Free and open-source |
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- Allows Python SW-developers to verify digital systems |
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- Allows Python SW-developers to verify digital systems |
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- Supports all major simulators used by FPGA teams |
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- Supports all major simulators used by FPGA teams |
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## Presentations code examples |
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## Presentation's code examples |
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* https://github.com/tmeissner/cocotb_with_ghdl |
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* https://github.com/tmeissner/cocotb_with_ghdl |
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@ -491,7 +490,7 @@ dut.some_array[0].value = 1 |
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- Triggers in the postpone phase |
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- Triggers in the postpone phase |
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- All signals have settled |
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- All signals have settled |
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- No more updates may occur on the clock edge event |
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- No more updates may occur on the clock edge event |
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- Sampling any signal here returns values settled current clock cycle |
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- Sampling any signal here returns values settled in current clock cycle |
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# Extras: Accessing signals |
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# Extras: Accessing signals |
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