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324 lines
8.1 KiB
324 lines
8.1 KiB
module properties (
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input Reset_n_i,
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input Clk_i,
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input [7:0] Din_i,
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input DinValid_i,
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input DinStart_i,
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input DinStop_i,
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input DinAccept_o,
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input [7:0] Dout_o,
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input DoutValid_o,
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input DoutStart_o,
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input DoutStop_o,
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input DoutAccept_i,
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// Internals
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input [2:0] s_fsm_state,
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input [7:0] s_header,
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input [7:0] s_data,
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input s_error,
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input [7:0] s_register [0:7]
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);
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// commands
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`define READ 0
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`define WRITE 1
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// FSM states
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`define IDLE 0
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`define GET_HEADER 1
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`define GET_DATA 2
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`define SET_DATA 3
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`define SEND_HEADER 4
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`define SEND_DATA 5
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`define SEND_FOOTER 6
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reg init_state = 1;
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// Initial reset
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always @(*) begin
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if (init_state) assume (!Reset_n_i);
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if (!init_state) assume (Reset_n_i);
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end
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always @(posedge Clk_i)
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init_state = 0;
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// Default clocking & reset
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default clocking
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@(posedge Clk_i);
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endclocking
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default disable iff (!Reset_n_i);
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// Constraints
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assume property (
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DinValid_i && !DinAccept_o |=>
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$stable(DinValid_i)
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);
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assume property (
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DinValid_i && !DinAccept_o |=>
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$stable(Din_i)
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);
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assume property (
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DinValid_i && !DinAccept_o |=>
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$stable(DinStart_i)
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);
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assume property (
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DinValid_i && !DinAccept_o |=>
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$stable(DinStop_i)
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);
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// Asserts
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fsm_state_valid_a : assert property (
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s_fsm_state >= `IDLE && s_fsm_state <= `SEND_FOOTER
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);
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valid_when_start_a : assert property (
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DoutStart_o |->
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DoutValid_o
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);
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start_off_when_acked_a : assert property (
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DoutStart_o && DoutAccept_i |=>
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!DoutStart_o
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);
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valid_when_stop_a : assert property (
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DoutStop_o |->
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DoutValid_o
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);
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stop_off_when_acked_a : assert property (
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DoutStop_o && DoutAccept_i |=>
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!DoutStop_o
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);
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store_header_a : assert property (
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s_fsm_state == `GET_HEADER && DinValid_i && DinStart_i && DinAccept_o |=>
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s_header == $past(Din_i)
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);
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// State changes
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// IDLE -> GET_HEADER
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fsm_idle_to_get_header_a : assert property (
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s_fsm_state == `IDLE |=>
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s_fsm_state == `GET_HEADER
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);
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// GET_HEADER -> GET_DATA
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fsm_get_header_to_get_data_a : assert property (
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s_fsm_state == `GET_HEADER && DinValid_i && DinStart_i && DinStop_i && Din_i[3:0] == `READ |=>
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s_fsm_state == `GET_DATA
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);
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// GET_HEADER -> SET_DATA
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fsm_get_header_to_set_data_a : assert property (
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s_fsm_state == `GET_HEADER && DinValid_i && DinStart_i && !DinStop_i && Din_i[3:0] == `WRITE |=>
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s_fsm_state == `SET_DATA
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);
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// GET_DATA -> SEND_HEADER
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fsm_get_data_to_send_header_a : assert property (
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s_fsm_state == `GET_DATA |=>
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s_fsm_state == `SEND_HEADER
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);
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// SET_DATA -> IDLE
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fsm_set_data_to_idle_a : assert property (
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s_fsm_state == `SET_DATA && DinValid_i && !DinStop_i |=>
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s_fsm_state == `IDLE
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);
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// SET_DATA -> SEND_HEADER
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fsm_set_data_to_send_header_a : assert property (
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s_fsm_state == `SET_DATA && DinValid_i && DinStop_i |=> s_fsm_state == `SEND_HEADER
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);
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// SEND_HEADER -> SEND_DATA
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fsm_send_header_to_send_data_a : assert property (
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s_fsm_state == `SEND_HEADER && DoutValid_o && DoutAccept_i && s_header[3:0] == `READ |=>
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s_fsm_state == `SEND_DATA
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);
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// SEND_HEADER -> SEND_FOOTER
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fsm_send_header_to_send_footer_a : assert property (
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s_fsm_state == `SEND_HEADER && DoutValid_o && DoutAccept_i && s_header[3:0] == `WRITE |=>
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s_fsm_state == `SEND_FOOTER
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);
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// SEND_DATA -> SEND_FOOTER
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fsm_send_data_to_send_footer_a : assert property (
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s_fsm_state == `SEND_DATA && DoutValid_o && DoutAccept_i |=>
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s_fsm_state == `SEND_FOOTER
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);
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// SEND_FOOTER -> IDLE
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fsm_send_footer_to_idle_a : assert property (
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s_fsm_state == `SEND_FOOTER && DoutValid_o && DoutAccept_i |=>
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s_fsm_state == `IDLE
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);
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// Protocol checks
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header_in_valid_range_a : assert property (
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s_fsm_state > `GET_HEADER |->
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s_header[3:0] inside {`READ, `WRITE}
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);
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header_stable_a : assert property (
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s_fsm_state > `GET_HEADER |=>
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$stable(s_header)
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);
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header_dout_valid_a : assert property (
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DoutStart_o && DoutValid_o |->
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Dout_o == s_header
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);
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error_flag_initial_false_a : assert property (
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s_fsm_state inside {`GET_HEADER, `GET_DATA, `SET_DATA} |->
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!s_error
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);
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error_flag_set_invalid_addr_a : assert property (
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s_fsm_state >= `SEND_HEADER |->
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s_error == !(s_header[7:4] <= 7)
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);
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footer_dout_valid_a :assert property (
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DoutStop_o && DoutValid_o |->
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Dout_o == s_error
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);
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doutvalid_stable_until_acked_a : assert property (
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DoutValid_o && !DoutAccept_i |=>
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$stable(DoutValid_o)
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);
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dout_stable_until_acked_a : assert property (
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DoutValid_o && !DoutAccept_i |=>
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$stable(Dout_o)
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);
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doutstart_stable_until_acked_a : assert property (
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DoutValid_o && !DoutAccept_i |=>
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$stable(DoutStart_o)
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);
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doutstop_stable_until_acked_a : assert property (
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DoutValid_o && !DoutAccept_i |=>
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$stable(DoutStop_o)
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);
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onehot_doutstart_doutstop_a : assert property (
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DoutValid_o |-> $onehot0({DoutStart_o, DoutStop_o})
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);
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doutstart_in_valid_fsm_state_a : assert property (
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DoutStart_o |->
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s_fsm_state == `SEND_HEADER
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);
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doutstop_in_valid_fsm_state_a : assert property (
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DoutStop_o |->
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s_fsm_state == `SEND_FOOTER
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);
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doutvalid_in_valid_fsm_states_a : assert property (
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DoutValid_o |->
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s_fsm_state inside {`SEND_HEADER, `SEND_DATA, `SEND_FOOTER}
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);
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// Write ack frame
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write_frame_a : assert property (
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DoutValid_o && DoutStart_o && DoutAccept_i && Dout_o[3:0] == `WRITE |=>
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!DoutValid_o ##1
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DoutValid_o && DoutStop_o
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);
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// Read ack frame
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read_frame_a : assert property (
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DoutValid_o && DoutStart_o && DoutAccept_i && Dout_o[3:0] == `READ |=>
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!DoutValid_o ##1
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DoutValid_o && !DoutStart_o && !DoutStop_o && !DoutAccept_i [*] ##1
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DoutValid_o && !DoutStart_o && !DoutStop_o && DoutAccept_i ##1
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!DoutValid_o ##1
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DoutValid_o && DoutStop_o
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);
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// Register read in GET_DATA if valid adress was given
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get_data_valid_a : assert property (
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s_fsm_state > `GET_DATA && s_header[7:4] <= 7 && s_header[3:0] == `READ |->
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s_data == s_register[s_header[7:4]]
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);
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// Error flag set & no register read in GET_DATA if invalid adress was given
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get_data_invalid_a : assert property (
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s_fsm_state > `GET_DATA && s_header[7:4] > 7 && s_header[3:0] == `READ |=>
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s_data == 0 && s_error
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);
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// register stable if read request
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reg_stable_during_read_a : assert property (
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s_fsm_state > `GET_HEADER && s_header[3:0] == `READ |=>
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$stable(s_register)
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);
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// Read ack data correct if address is valid
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read_ack_data_valid_a : assert property (
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DoutValid_o && DoutStart_o && DoutAccept_i && Dout_o[3:0] == `READ && s_header[7:4] <= 7 |=>
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!DoutValid_o ##1
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DoutValid_o && !DoutStart_o && !DoutStop_o && Dout_o == s_data
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);
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// Read ack data zero if address is invalid
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read_ack_data_invalid_a : assert property (
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DoutValid_o && DoutStart_o && DoutAccept_i && Dout_o[3:0] == `READ && s_header[7:4] > 7 |=>
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!DoutValid_o ##1
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DoutValid_o && !DoutStart_o && !DoutStop_o && Dout_o == 0
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);
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// Register write in SET_DATA if valid adress was given
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set_data_valid_a : assert property (
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s_fsm_state == `SET_DATA && DinValid_i && DinAccept_o && DinStop_i && s_header[7:4] <= 7 |=>
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s_register[s_header[7:4]] == $past(Din_i)
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);
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// Error flag set & no register write in SET_DATA if invalid adress was given
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set_data_invalid_a : assert property (
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s_fsm_state == `SET_DATA && DinValid_i && DinAccept_o && DinStop_i && s_header[7:4] > 7 |=>
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$stable(s_register) && s_error
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);
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// No register write in SET_DATA if stop don't active
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set_data_discard_a : assert property (
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s_fsm_state == `SET_DATA && DinValid_i && DinAccept_o && !DinStop_i |=>
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$stable(s_register)
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);
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fsm_read_req_when_get_data_a : assert property (
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s_fsm_state == `GET_DATA |-> s_header[3:0] == `READ
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);
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fsm_write_req_when_set_data_a : assert property (
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s_fsm_state == `SET_DATA |-> s_header[3:0] == `WRITE
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);
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endmodule
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bind vai_reg properties properties (.*);
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