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  1. DESIGN_NAME := uart_aes
  2. AES_DIR := ../../cryptocores/aes/rtl/vhdl
  3. CRYPTO_SRC := \
  4. $(AES_DIR)/aes_pkg.vhd \
  5. $(AES_DIR)/aes_enc.vhd \
  6. $(AES_DIR)/aes_dec.vhd \
  7. $(AES_DIR)/aes.vhd \
  8. $(AES_DIR)/../../../ctraes/rtl/vhdl/ctraes.vhd
  9. WORK_FILES := \
  10. ../rtl/uart_aes_types.vhd \
  11. ../rtl/uart_tx.vhd \
  12. ../rtl/uart_rx.vhd \
  13. ../rtl/uart_ctrl.vhd \
  14. ../rtl/${DESIGN_NAME}.vhd \
  15. uart_aes_sim.vhd \
  16. uart_aes_ref.vhd \
  17. tb_${DESIGN_NAME}.vhd
  18. GM_FILES := ../../lib/rtl_components.vhd ../../lib/sim_components.vhd
  19. SIM_SRC := tb_${DESIGN_NAME}.vhd
  20. SIM_FLAGS := --std=08 -fpsl --workdir=work -Pwork
  21. .PHONY: all compile sim clean
  22. all: sim
  23. compile: tb_${DESIGN_NAME}
  24. work/work-obj08.cf: ${WORK_FILES} work/gatemate-obj08.cf work/cryptocores-obj08.cf
  25. mkdir -p work
  26. ghdl -a ${SIM_FLAGS} --work=work ${WORK_FILES}
  27. work/cryptocores-obj08.cf: ${CRYPTO_SRC}
  28. mkdir -p work
  29. ghdl -a $(SIM_FLAGS) --work=cryptocores ${CRYPTO_SRC}
  30. work/gatemate-obj08.cf: ${GM_FILES}
  31. mkdir -p work
  32. ghdl -a ${SIM_FLAGS} --work=gatemate ${GM_FILES}
  33. tb_${DESIGN_NAME}: work/work-obj08.cf uart_aes_ref.c
  34. @echo "Elaborate testbench & design ..."
  35. ghdl -e ${SIM_FLAGS} -Wl,uart_aes_ref.c -Wl,-lcrypto -Wl,-lssl $@
  36. sim: tb_${DESIGN_NAME}
  37. @echo "Run testbench ..."
  38. ghdl -r ${SIM_FLAGS} tb_${DESIGN_NAME} --assert-level=error --ieee-asserts=disable --wave=tb_${DESIGN_NAME}.ghw
  39. work:
  40. mkdir $@
  41. clean:
  42. @echo "Cleaning simulation files ..."
  43. rm -rf tb_${DESIGN_NAME} tb_${DESIGN_NAME}.ghw *.o work/