tmeissner
/
libvhdl
1
0
Fork 0
Code Issues 0 Pull Requests 0 Releases 0 Activity
Library of reusable VHDL components
You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
118 Commits
2 Branches
914 KiB
Tree: e953cda1d8
Branches Tags
${ item.name }
Create branch ${ searchTerm }
from 'e953cda1d8'
${ noResults }
libvhdl/test/WishBoneT.tcl

11 lines
488 B
Raw Normal View History

Refactoring Wishbone tests & design * Add 1st initial version of WishBone checker unit * Add Wishbone package with component & type declarations * Replace WB slave register by dictionary
6 years ago
​
​
​
​
​
​
​
​
​
​
 
  1. set signals [list]
  2. lappend signals "top.WishBoneT.s_wb_reset"
  3. lappend signals "top.WishBoneT.s_wb_clk"
  4. lappend signals "top.WishBoneT.s_wishbone.cyc"
  5. lappend signals "top.WishBoneT.s_wishbone.stb"
  6. lappend signals "top.WishBoneT.s_wishbone.we"
  7. lappend signals "top.WishBoneT.s_wishbone.ack"
  8. lappend signals "top.WishBoneT.s_wishbone.adr"
  9. lappend signals "top.WishBoneT.s_wishbone.wdat"
  10. lappend signals "top.WishBoneT.s_wishbone.rdat"
  11. set num_added [ gtkwave::addSignalsFromList $signals ]