compile all packages in library 'libvhdl' now & use the library in the testbenches

sim/AssertP.vhd

@@ -1,7 +1,8 @@
 library ieee;
   use ieee.std_logic_1164.all;
 
-use work.StringP.all;
+library libvhdl;
+  use libvhdl.StringP.all;
 
 
 

test/Makefile

@@ -5,12 +5,14 @@ VHD_STD = 02
 sim: queuet stringt
 
 queuet : QueueT.vhd $(SIM_SRC)/QueueP.vhd $(SIM_SRC)/StringP.vhd $(SIM_SRC)/AssertP.vhd
-	ghdl -a --std=$(VHD_STD) $(SIM_SRC)/StringP.vhd $(SIM_SRC)/AssertP.vhd $(SIM_SRC)/QueueP.vhd QueueT.vhd
+	ghdl -a --std=$(VHD_STD) --work=libvhdl $(SIM_SRC)/StringP.vhd $(SIM_SRC)/AssertP.vhd $(SIM_SRC)/QueueP.vhd
+	ghdl -a --std=$(VHD_STD) QueueT.vhd
 	ghdl -e --std=$(VHD_STD) QueueT
 	ghdl -r --std=$(VHD_STD) QueueT
 
 stringt : StringT.vhd $(SIM_SRC)/StringP.vhd $(SIM_SRC)/AssertP.vhd
-	ghdl -a --std=$(VHD_STD) $(SIM_SRC)/StringP.vhd $(SIM_SRC)/AssertP.vhd StringT.vhd
+	ghdl -a --std=$(VHD_STD) --work=libvhdl $(SIM_SRC)/StringP.vhd $(SIM_SRC)/AssertP.vhd
+	ghdl -a --std=$(VHD_STD) StringT.vhd
 	ghdl -e --std=$(VHD_STD) StringT
 	ghdl -r --std=$(VHD_STD) StringT
 

test/QueueT.vhd

@@ -2,7 +2,9 @@ library ieee;
   use ieee.std_logic_1164.all;
   use ieee.numeric_std.all;
 
-use work.AssertP.all;
+library libvhdl;
+  use libvhdl.AssertP.all;
+  use libvhdl.QueueP.all;
 
 
 
@@ -14,8 +16,8 @@ end entity QueueT;
 architecture sim of QueueT is
 
 
-  shared variable sv_simple_queue : work.QueueP.t_simple_queue;
-  shared variable sv_list_queue   : work.QueueP.t_list_queue;
+  shared variable sv_simple_queue : t_simple_queue;
+  shared variable sv_list_queue   : t_list_queue;
 
 
 begin

test/StringT.vhd

@@ -2,8 +2,9 @@ library ieee;
   use ieee.std_logic_1164.all;
   use ieee.numeric_std.all;
 
-use work.StringP.all;
-use work.AssertP.all;
+library libvhdl;
+  use libvhdl.StringP.all;
+  use libvhdl.AssertP.all;
 
 
 
@@ -30,4 +31,4 @@ begin
   end process StringTestP;
 
 
-end architecture sim;
+end architecture sim;