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libvhdl
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fixed wrong period parameter usage in spi_master() procedure
pull/1/head
T. Meissner
10 years ago
parent
76f15e8c76
commit
f1de455fd4
1 changed files
with
7 additions
and
7 deletions
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+7
-7
sim/SimP.vhd
+ 7
- 7
sim/SimP.vhd
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@ -60,28 +60,28 @@ package body SimP is
if
(
cpha
=
0
)
then
for
i
in
data_in
'range
loop
mosi
<
=
data_in
(
i
)
;
wait
for
period
;
wait
for
period
/
2
;
sclk
<
=
not
(
sclk
)
;
data_out
(
i
)
:
=
miso
;
wait
for
period
;
wait
for
period
/
2
;
sclk
<
=
not
(
sclk
)
;
end
loop
;
wait
for
period
;
wait
for
period
/
2
;
else
mosi
<
=
'1'
;
wait
for
period
;
wait
for
period
/
2
;
for
i
in
data_in
'range
loop
sclk
<
=
not
(
sclk
)
;
mosi
<
=
data_in
(
i
)
;
wait
for
period
;
wait
for
period
/
2
;
sclk
<
=
not
(
sclk
)
;
data_out
(
i
)
:
=
miso
;
wait
for
period
;
wait
for
period
/
2
;
end
loop
;
end
if
;
ste
<
=
'1'
;
mosi
<
=
'1'
;
wait
for
period
;
wait
for
period
/
2
;
end
procedure
spi_master
;
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