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tmeissner
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libvhdl
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Library of reusable VHDL components
vhdl
ghdl
osvvm
psl
fpga
testbenches
coverage
66
Commits
2
Branches
914 KiB
VHDL
95.5%
Makefile
3.7%
Tcl
0.8%
Tree:
1bb058f3a2
libvhdl
/
syn
History
T. Meissner
f0e490142e
moved register write into ADDRESS state, decreasing the write to one cycle only
10 years ago
..
SpiMasterE.vhd
ste is now generated combinatoral in parallel to the fsm
11 years ago
SpiSlaveE.vhd
add generic G_DATA_DIR to set if we want transfer from LSB to MSB ore vice versa
11 years ago
WishBoneMasterE.vhd
react to slave ack in ADDRESS state
10 years ago
WishBoneSlaveE.vhd
moved register write into ADDRESS state, decreasing the write to one cycle only
10 years ago