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85 lines
2.1 KiB
85 lines
2.1 KiB
library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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--+ including vhdl 2008 libraries
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--+ These lines can be commented out when using
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--+ a simulator with built-in VHDL 2008 support
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--library ieee_proposed;
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-- use ieee_proposed.standard_additions.all;
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-- use ieee_proposed.std_logic_1164_additions.all;
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-- use ieee_proposed.numeric_std_additions.all;
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library osvvm;
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use osvvm.RandomPkg.all;
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library libvhdl;
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use libvhdl.DictP.all;
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entity DictT is
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end entity DictT;
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architecture sim of DictT is
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type t_scoreboard is array (natural range <>) of std_logic_vector(7 downto 0);
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shared variable sv_dict : t_dict;
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begin
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DictInitP : process is
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begin
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sv_dict.init(false);
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wait;
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end process DictInitP;
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DictTestP : process is
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variable v_key : string(1 to 4);
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variable v_random : RandomPType;
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variable v_input : std_logic_vector(7 downto 0);
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variable v_output : std_logic_vector(7 downto 0);
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variable v_scoreboard : t_scoreboard(0 to 256);
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begin
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v_random.InitSeed(v_random'instance_name);
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-- check initial emptiness
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assert sv_dict.size = 0
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report "ERROR: Dict should be empty"
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severity failure;
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-- fill dictionary and check count
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report "INFO: Test : Fill dictionary";
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for i in 0 to 255 loop
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v_input := v_random.RandSlv(8);
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sv_dict.set(integer'image(i), v_input);
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v_scoreboard(i) := v_input;
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assert sv_dict.size = i+1
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report "ERROR: Dict should have " & to_string(i+1) & " entries"
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severity failure;
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end loop;
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report "INFO: Test successful";
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-- read all entries and check for correct data
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report "INFO: Test : Read dictionary";
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for i in 0 to 255 loop
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sv_dict.get(integer'image(i), v_output);
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assert v_output = v_scoreboard(i)
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report "ERROR: Got 0x" & to_hstring(v_output) & ", expected 0x" & to_hstring(v_scoreboard(i))
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severity failure;
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end loop;
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report "INFO: Test successful";
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report "INFO: t_dict test finished successfully";
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wait;
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end process DictTestP;
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end architecture sim;
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