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add nomerge attribute to ring oscillator line

master
T. Meissner 9 years ago
parent
commit
0d15230dc8
1 changed files with 5 additions and 1 deletions
  1. +5
    -1
      raspiFpga/src/FiRoE.vhd

+ 5
- 1
raspiFpga/src/FiRoE.vhd View File

@ -23,13 +23,17 @@ architecture rtl of FiRoE is
signal s_ring : std_logic_vector(15 downto 0);
signal s_tff : std_logic;
--+ attributes for synplify synthesis tool to preserve inverter loop
--+ attributes for synthesis tool to preserve inverter loop
attribute syn_keep : boolean;
attribute syn_hier : string;
attribute syn_hier of rtl : architecture is "hard";
attribute syn_keep of s_ring : signal is true;
attribute syn_keep of s_tff : signal is true;
--+ Attributes for lattice map tool to not merging inverter loop
attribute nomerge : boolean;
attribute nomerge of s_ring : signal is true;
begin


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