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add clearing of SPIIRQ register

master
T. Meissner 10 years ago
parent
commit
943d8ca18d
2 changed files with 16 additions and 7 deletions
  1. +15
    -6
      raspiFpga/src/RaspiFpgaCtrlE.vhd
  2. +1
    -1
      raspiFpga/src/RaspiFpgaE.vhd

+ 15
- 6
raspiFpga/src/RaspiFpgaCtrlE.vhd View File

@ -41,7 +41,7 @@ architecture rtl of RaspiFpgaCtrlE is
type t_cmdctrl_fsm is (IDLE, INIT_SET, INIT_ACK, TXDR_SET, TXDR_ACK, INT_WAIT, type t_cmdctrl_fsm is (IDLE, INIT_SET, INIT_ACK, TXDR_SET, TXDR_ACK, INT_WAIT,
RXDR_SET, RXDR_ACK);
RXDR_SET, RXDR_ACK, INT_CLEAR_SET, INT_CLEAR_ACK);
signal s_cmdctrl_fsm : t_cmdctrl_fsm; signal s_cmdctrl_fsm : t_cmdctrl_fsm;
@ -73,11 +73,12 @@ begin
--+ FSM to write/request data from the wishbone master --+ FSM to write/request data from the wishbone master
--+ Combinatoral outputs --+ Combinatoral outputs
LocalWen_o <= '1' when s_cmdctrl_fsm = INIT_SET or s_cmdctrl_fsm = TXDR_SET else '0';
LocalWen_o <= '1' when s_cmdctrl_fsm = INIT_SET or s_cmdctrl_fsm = TXDR_SET or s_cmdctrl_fsm = INT_CLEAR_SET else '0';
LocalRen_o <= '1' when s_cmdctrl_fsm = RXDR_SET else '0'; LocalRen_o <= '1' when s_cmdctrl_fsm = RXDR_SET else '0';
LocalAdress_o <= C_INIT(s_init_cnt).adr when s_cmdctrl_fsm = INIT_SET else
C_SPITXDR when s_cmdctrl_fsm = TXDR_SET else
C_SPIRXDR when s_cmdctrl_fsm = RXDR_SET else
LocalAdress_o <= C_INIT(s_init_cnt).adr when s_cmdctrl_fsm = INIT_SET else
C_SPITXDR when s_cmdctrl_fsm = TXDR_SET else
C_SPIRXDR when s_cmdctrl_fsm = RXDR_SET else
C_SPIIRQ when s_cmdctrl_fsm = INT_CLEAR_SET else
(others => '0'); (others => '0');
LocalData_o <= C_INIT(s_init_cnt).data when s_cmdctrl_fsm = INIT_SET else LocalData_o <= C_INIT(s_init_cnt).data when s_cmdctrl_fsm = INIT_SET else
s_register(s_register_address) when s_cmdctrl_fsm = TXDR_SET and s_spi_frame = READ_DATA else s_register(s_register_address) when s_cmdctrl_fsm = TXDR_SET and s_spi_frame = READ_DATA else
@ -125,9 +126,17 @@ begin
when RXDR_ACK => when RXDR_ACK =>
if (LocalAck_i = '1') then if (LocalAck_i = '1') then
s_cmdctrl_fsm <= TXDR_SET;
s_cmdctrl_fsm <= INT_CLEAR_SET;
end if; end if;
when INT_CLEAR_SET =>
s_cmdctrl_fsm <= INT_CLEAR_ACK;
when INT_CLEAR_ACK =>
if (LocalAck_i = '1') then
s_cmdctrl_fsm <= TXDR_SET;
end if;
when others => when others =>
null; null;


+ 1
- 1
raspiFpga/src/RaspiFpgaE.vhd View File

@ -15,7 +15,7 @@ entity RaspiFpgaE is
SpiMosi_i : inout std_logic; SpiMosi_i : inout std_logic;
SpiMiso_o : inout std_logic; SpiMiso_o : inout std_logic;
--* interrupt line to raspi --* interrupt line to raspi
RaspiIrq_o : out std_logic
RaspiIrq_o : out std_logic
); );
end entity RaspiFpgaE; end entity RaspiFpgaE;


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