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vhdl_verification
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Examples and design pattern for VHDL verification
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vhdl_verification/osvvm_fsm_psl_coverage/osvvm_fsm_psl_coverage.tcl

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Add functional FSM coverage using OSVVM & PSL endpoints
8 years ago
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  1. set signals [list]
  2. lappend signals "top.osvvm_fsm_psl_coverage.s_reset_n"
  3. lappend signals "top.osvvm_fsm_psl_coverage.s_clk"
  4. lappend signals "top.osvvm_fsm_psl_coverage.s_fsm_state"
  5. lappend signals "top.osvvm_fsm_psl_coverage.s_state_cover"
  6. set num_added [ gtkwave::addSignalsFromList $signals ]