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@ -5,14 +5,24 @@ DUT ?= aes |
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EXT := ../ext |
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ifeq (${DUT}, wishbone) |
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TOPLEVEL := wishboneslavee |
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SIM_ARGS := -gSimulation=true \
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-gAddressWidth=8 \
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-gDataWidth=16 |
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TOPLEVEL := wishboneslavee |
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SIM_ARGS := -gSimulation=true \
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-gAddressWidth=8 \
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-gDataWidth=16 |
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else |
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TOPLEVEL := ${DUT} |
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TOPLEVEL := ${DUT} |
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endif |
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ifeq (check, $(firstword $(MAKECMDGOALS))) |
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ifeq (FIX, $(lastword $(MAKECMDGOALS))) |
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RUFF_ARGS := --fix |
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endif |
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endif |
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.PHONY: |
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FIX: |
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@# |
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# Cocotb related
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MODULE := tb_${DUT} |
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COCOTB_LOG_LEVEL := DEBUG |
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@ -24,28 +34,41 @@ SIM ?= ghdl |
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TOPLEVEL_LANG := vhdl |
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VHDL_SOURCES_libvhdl := ${EXT}/libvhdl/common/UtilsP.vhd |
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VHDL_SOURCES := ${EXT}/libvhdl/syn/* \
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${EXT}/cryptocores/aes/rtl/vhdl/*.vhd |
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${EXT}/cryptocores/aes/rtl/vhdl/*.vhd |
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SIM_BUILD := build |
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ifeq (${SIM}, ghdl) |
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COMPILE_ARGS := --std=08 |
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SIM_ARGS += \
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--wave=results/${MODULE}.ghw \
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--psl-report=results/${MODULE}_psl.json \
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--vpi-trace=results/${MODULE}_vpi.log |
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COMPILE_ARGS := --std=08 |
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SIM_ARGS += \
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--wave=results/${MODULE}.ghw \
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--psl-report=results/${MODULE}_psl.json \
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--vpi-trace=results/${MODULE}_vpi.log |
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else |
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EXTRA_ARGS := --std=08 |
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VHDL_LIB_ORDER := libvhdl |
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EXTRA_ARGS := --std=08 |
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VHDL_LIB_ORDER := libvhdl |
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endif |
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check format: |
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ifneq (, $(shell which ruff)) |
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ruff $@ *.py $(RUFF_ARGS) |
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else |
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@echo "ERROR: ruff not found"; exit 1 |
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endif |
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ifneq (, $(shell which cocotb-config)) |
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include $(shell cocotb-config --makefiles)/Makefile.sim |
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else |
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$(warning WARNING: cocotb not found) |
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endif |
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results: |
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mkdir -p results |
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.PHONY: clean |
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clean:: |
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rm -rf *.o __pycache__ uarttx uartrx wishboneslavee aes results $(SIM_BUILD) |
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.PHONY: clean check format FIX |