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@ -13,6 +13,12 @@ else |
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TOPLEVEL := ${DUT} |
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endif |
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# Cocotb related
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MODULE := tb_${DUT} |
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COCOTB_LOG_LEVEL := DEBUG |
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CUSTOM_COMPILE_DEPS := results |
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COCOTB_RESULTS_FILE := results/${MODULE}.xml |
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# Simulator (GHDL) & RTL related
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SIM := ghdl |
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TOPLEVEL_LANG := vhdl |
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@ -22,15 +28,9 @@ VHDL_SOURCES := ${EXT}/libvhdl/syn/*.vhd \ |
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SIM_BUILD := work |
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COMPILE_ARGS := --std=08 |
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SIM_ARGS += \
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--wave=results/${TOPLEVEL}.ghw \
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--psl-report=results/${TOPLEVEL}_psl.json \
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--vpi-trace=results/${TOPLEVEL}_vpi.log |
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# Cocotb related
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MODULE := tb_${DUT} |
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COCOTB_LOG_LEVEL := DEBUG |
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CUSTOM_COMPILE_DEPS := results |
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COCOTB_RESULTS_FILE := results/${TOPLEVEL}.xml |
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--wave=results/${MODULE}.ghw \
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--psl-report=results/${MODULE}_psl.json \
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--vpi-trace=results/${MODULE}_vpi.log |
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include $(shell cocotb-config --makefiles)/Makefile.sim |
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