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Remove non-needed imports & ReadOnly() calls

master
T. Meissner 3 years ago
parent
commit
d032d83d63
7 changed files with 13 additions and 21 deletions
  1. +1
    -2
      tests/Sram.py
  2. +1
    -5
      tests/Uart.py
  3. +1
    -3
      tests/Vai.py
  4. +1
    -4
      tests/tb_aes.py
  5. +3
    -3
      tests/tb_uartrx.py
  6. +3
    -3
      tests/tb_uarttx.py
  7. +3
    -1
      tests/tb_wishbone.py

+ 1
- 2
tests/Sram.py View File

@ -1,7 +1,7 @@
import logging
import cocotb
from cocotb.utils import get_sim_time
from cocotb.triggers import FallingEdge, RisingEdge, Timer, ReadOnly
from cocotb.triggers import FallingEdge, RisingEdge, Timer
class Sram:
@ -111,7 +111,6 @@ class SramMonitor(Sram):
elif self._ren.value:
_adr = self._adr.value
await self._clkedge
await ReadOnly()
self._transactions[str(get_sim_time('ns'))] = {
"type" : "read",
"adr" : _adr,


+ 1
- 5
tests/Uart.py View File

@ -1,5 +1,5 @@
import logging
from cocotb.triggers import FallingEdge, RisingEdge, Timer, ReadOnly
from cocotb.triggers import FallingEdge, RisingEdge, Timer
class Uart:
@ -53,7 +53,6 @@ class UartReceiver(Uart):
self._rec = 0
for x in range(self._bits):
await self._wait_cycle()
await ReadOnly()
self._rec |= bool(self._txrx.value.integer) << x
if self._par:
@ -70,21 +69,18 @@ class UartReceiver(Uart):
"""Consume and check start bit"""
for x in range(int(self._div/2)):
await self._clkedge
await ReadOnly()
if self._txrx.value == 1:
self.log.warning("Start bit set")
async def _get_stop_bit(self):
"""Consume and check stop bit"""
await self._wait_cycle()
await ReadOnly()
if self._txrx.value == 0:
self.log.warning("Stop bit not set")
async def _get_parity_bit(self):
"""Consume and check parity bit"""
await self._wait_cycle()
await ReadOnly()
if self.odd_parity(self._rec) != self._txrx.value:
self.log.warning("Parity wrong")


+ 1
- 3
tests/Vai.py View File

@ -1,7 +1,7 @@
import logging
import cocotb
from cocotb.utils import get_sim_time
from cocotb.triggers import FallingEdge, RisingEdge, Timer, ReadOnly
from cocotb.triggers import FallingEdge, RisingEdge, Timer
class Vai:
@ -56,7 +56,6 @@ class VaiDriver(Vai):
self.log.info(f"Send data: {_info}")
while True:
await ReadOnly()
if self._accept.value:
break
await self._clkedge
@ -84,7 +83,6 @@ class VaiReceiver(Vai):
await self._clkedge
while True:
await ReadOnly()
if self._valid.value:
break
await self._clkedge


+ 1
- 4
tests/tb_aes.py View File

@ -1,13 +1,10 @@
import logging
import random
import cocotb
import pprint
from Vai import VaiDriver, VaiReceiver, VaiMonitor
from cocotb.clock import Clock
from cocotb.queue import Queue
from cocotb.triggers import FallingEdge, RisingEdge, Timer, ReadOnly
from cocotb.triggers import RisingEdge, Timer
from Crypto.Cipher import AES
from Crypto.Util.number import long_to_bytes, getRandomNBitInteger
import vsc


+ 3
- 3
tests/tb_uartrx.py View File

@ -1,10 +1,10 @@
import logging
import random
import cocotb
from Uart import UartDriver, UartReceiver
from Vai import VaiDriver, VaiReceiver
from Uart import UartDriver
from Vai import VaiReceiver
from cocotb.clock import Clock
from cocotb.triggers import FallingEdge, RisingEdge, Timer, ReadOnly
from cocotb.triggers import RisingEdge, Timer
# Reset coroutine


+ 3
- 3
tests/tb_uarttx.py View File

@ -1,10 +1,10 @@
import logging
import random
import cocotb
from Uart import UartDriver, UartReceiver
from Vai import VaiDriver, VaiReceiver
from Uart import UartReceiver
from Vai import VaiDriver
from cocotb.clock import Clock
from cocotb.triggers import FallingEdge, RisingEdge, Timer, ReadOnly
from cocotb.triggers import RisingEdge, Timer
# Reset coroutine


+ 3
- 1
tests/tb_wishbone.py View File

@ -5,7 +5,7 @@ import wavedrom
from collections import defaultdict
from Sram import SramRead, SramWrite, SramMonitor
from cocotb.clock import Clock
from cocotb.triggers import FallingEdge, RisingEdge, Timer, ReadOnly
from cocotb.triggers import RisingEdge, Timer
from cocotbext.wishbone.driver import WishboneMaster, WBOp
from cocotb.wavedrom import Wavedrom, trace
@ -77,6 +77,8 @@ async def test_wishbone(dut):
data = random.randint(0, 2**16-1)
await wbmaster.send_cycle([WBOp(adr=adr, dat=data)])
rec = await wbmaster.send_cycle([WBOp(adr=adr)])
assert rec[0].datrd == data, \
f"Read data incorrect, got {hex(rec[0].datrd)}, expected {hex(data)}"
# Print out waveforms as json & svg
_wave = waves.dumpj()


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