| 
						
						
							
								
							
						
						
					 | 
				
				 | 
				
					@ -73,7 +73,7 @@ tb_aes: ${RTL_SRC} ${SIM_SRC} ${C_SRC} osvvm/OsvvmContext.o | work | 
				
			
			
		
	
		
			
				
					 | 
					 | 
				
				 | 
				
						@echo "Analyze testbench & design ..." | 
				
			
			
		
	
		
			
				
					 | 
					 | 
				
				 | 
				
						ghdl -a --std=$(VHD_STD) -fpsl --workdir=work -P=osvvm ${RTL_SRC} ${SIM_SRC} | 
				
			
			
		
	
		
			
				
					 | 
					 | 
				
				 | 
				
						@echo "Elaborate testbench & design ..." | 
				
			
			
		
	
		
			
				
					 | 
					 | 
				
				 | 
				
						ghdl -e --std=$(VHD_STD) -fpsl --workdir=work -P=osvvm -Wl,-lcrypto -Wl,-lssl -Wl,$@.c $@ | 
				
			
			
		
	
		
			
				
					 | 
					 | 
				
				 | 
				
						ghdl -e --std=$(VHD_STD) -fpsl --workdir=work -P=osvvm -Wl,$@.c -Wl,-lcrypto -Wl,-lssl $@ | 
				
			
			
		
	
		
			
				
					 | 
					 | 
				
				 | 
				
					
 | 
				
			
			
		
	
		
			
				
					 | 
					 | 
				
				 | 
				
					
 | 
				
			
			
		
	
		
			
				
					 | 
					 | 
				
				 | 
				
					tb_aes.ghw: tb_aes | 
				
			
			
		
	
	
		
			
				
					| 
						
							
								
							
						
						
						
					 | 
				
				 | 
				
					
  |