cryptography ip-cores in vhdl / verilog
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T. Meissner 302ad79ced Add CBC-AES testbench using VHPIdirect & openSSL as reference 4 years ago
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rtl/vhdl Add CBC-AES VHDL design & synthesis Makefile 4 years ago
sim/vhdl Add CBC-AES testbench using VHPIdirect & openSSL as reference 4 years ago
syn/vhdl Add CBC-AES VHDL design & synthesis Makefile 4 years ago