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cryptocores
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cryptography ip-cores in vhdl / verilog
vhdl
ghdl
osvvm
fpga
testbenches
verilog
cryptography
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26
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1
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1.7 MiB
VHDL
51.3%
Verilog
33.4%
Makefile
10.2%
C
3.5%
Tcl
1.5%
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cryptocores
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cbcdes
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Torsten Meissner
80f6b63062
Revert 32e44bdf948f5fc3a420a37defe918ec55d67b6a^..HEAD
13 years ago
..
rtl
register mode_i and iv_i only if start_i is high
13 years ago
sim
Revert 32e44bdf948f5fc3a420a37defe918ec55d67b6a^..HEAD
13 years ago