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cryptocores
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cryptography ip-cores in vhdl / verilog
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cryptocores/des
Torsten Meissner 8f2e24fb8c new verilog testbench, makefile & tcl-file 13 years ago
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rtl new synchronous process for mode & valid signals 13 years ago
sim new verilog testbench, makefile & tcl-file 13 years ago