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cryptography ip-cores in vhdl / verilog
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cryptocores/des/sim
Torsten Meissner a08763c2a0 new test case: Substitution table known answer test - encryption 13 years ago
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makefile set assertion level for ghdl to 'error', expanded simulation time to 7us 13 years ago
tb_des.vhd new test case: Substitution table known answer test - encryption 13 years ago