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tmeissner
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cryptocores
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cryptography ip-cores in vhdl / verilog
vhdl
ghdl
osvvm
fpga
testbenches
verilog
cryptography
23
Commits
1
Branch
1.7 MiB
VHDL
51.3%
Verilog
33.4%
Makefile
10.2%
C
3.5%
Tcl
1.5%
Tree:
b9ed938d6d
cryptocores
/
cbcdes
/
rtl
History
Torsten Meissner
b9ed938d6d
register mode_i and iv_i only if start_i is high
14 years ago
..
cbcdes.vhd
register mode_i and iv_i only if start_i is high
14 years ago
des.vhd
Initial Release of CBC-DES
14 years ago
des_pkg.vhd
Initial Release of CBC-DES
14 years ago