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cryptography ip-cores in vhdl / verilog
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cryptocores/des/rtl
T. Meissner b9efb85f01 add second iterative implementation; selection between the two implementations by #ifdef's 9 years ago
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verilog add second iterative implementation; selection between the two implementations by #ifdef's 9 years ago
vhdl internal mode is now a latched copy of mode_i (ITER) 10 years ago