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tmeissner
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cryptocores
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cryptography ip-cores in vhdl / verilog
vhdl
ghdl
osvvm
fpga
testbenches
verilog
cryptography
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168
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1.7 MiB
VHDL
51.3%
Verilog
33.4%
Makefile
10.2%
C
3.5%
Tcl
1.5%
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cryptocores
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History
T. Meissner
b9efb85f01
add second iterative implementation; selection between the two implementations by #ifdef's
10 years ago
..
verilog
add second iterative implementation; selection between the two implementations by #ifdef's
10 years ago
vhdl
internal mode is now a latched copy of mode_i (ITER)
10 years ago