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cryptocores
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cryptography ip-cores in vhdl / verilog
vhdl
ghdl
osvvm
fpga
testbenches
verilog
cryptography
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1.7 MiB
VHDL
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Verilog
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Tcl
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cryptocores
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Torsten Meissner
e32dae12f1
Revision 1.1 2011/09/18
now with all ecb tests of NIST 800-16 publication except the modes-tests
13 years ago
..
rtl
initialize all internal variables to 0 to remove numeric_std-lib warnings
13 years ago
sim
Revision 1.1 2011/09/18
13 years ago