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tmeissner
/
cryptocores
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cryptography ip-cores in vhdl / verilog
vhdl
ghdl
osvvm
fpga
testbenches
verilog
cryptography
93
Commits
1
Branch
1.7 MiB
VHDL
51.3%
Verilog
33.4%
Makefile
10.2%
C
3.5%
Tcl
1.5%
Tree:
fd799eeed1
cryptocores
/
cbctdes
/
rtl
History
Torsten Meissner
2e7c021255
initial release of tdes in cbc mode
13 years ago
..
cbctdes.vhd
initial release of tdes in cbc mode
13 years ago
des.vhd
initial release of tdes in cbc mode
13 years ago
des_pkg.vhd
initial release of tdes in cbc mode
13 years ago
tdes.vhd
initial release of tdes in cbc mode
13 years ago