tmeissner
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formal_hw_verification
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8 Commits (1ef9d692c8ad53bfb34f45024507e892e1ff8415)

Author SHA1 Message Date
  T. Meissner d94585cad8 Making counter design work with GHDL synthesis 5 years ago
  T. Meissner ac767bb9d3 Use SVA defaults for clock & reset; minor RTL optimizations for bettrer readability 6 years ago
  T. Meissner 307c6b5f44 Add clock constrain using global clocking 6 years ago
  T. Meissner 5b8d9650e0 Add genric setting counter end value 6 years ago
  T. Meissner 9d03113704 Make the unbounded prove work 6 years ago
  T. Meissner 3c042a168b Remove unused Data_i port from testbench 6 years ago
  T. Meissner dd0642e762 parameterize design; fix minor makefile problemswq 6 years ago
  T. Meissner 9d0198b0b4 Add counter as example for initial reset problems 6 years ago