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tmeissner
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gatemate_experiments
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2 Commits (6cffeef4a5fa017a4c13ebfab447cd3c9e7f89db)
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T. Meissner
61affc8b49
Add uart tx/rx modules, add make targets and testbenches for rtl, post-syn & post-imp simulations
2 years ago
T. Meissner
0e84416a92
Rename uart folder to uart_reg
2 years ago