|
|
- The original repository is located on my own git-server at [https://git.goodcleanfun.de/tmeissner/lfd111x_building_a_risc-v-cpu_core](https://git.goodcleanfun.de/tmeissner/lfd111x_building_a_risc-v-cpu_core)
-
- It is mirrored to github with every push, so both should be in sync.
-
-
- # lfd111x_building_a_risc-v-cpu_core
-
- Code from the Linux Foundation course [*Building a RISC-V CPU Core*](https://learning.edx.org/course/course-v1:LinuxFoundationX+LFD111x+1T2021/home) at edX. I have added VHDL implementations equivalent to the TL-Verilog ones.
|