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15 lines
401 B
15 lines
401 B
DESIGN := risc_v
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DESIGN_SRC := risc_v_pkg.vhd risc_v.vhd
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TESTBENCH := tb_${DESIGN}
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.PHONY: sim
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sim: tb_${DESIGN}.ghw
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${TESTBENCH}.ghw : ${DESIGN_SRC} ${TESTBENCH}.vhd
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ghdl -a --std=08 ${DESIGN_SRC} ${TESTBENCH}.vhd
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ghdl -e --std=08 ${TESTBENCH}
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ghdl -r --std=08 ${TESTBENCH} --vcd=${TESTBENCH}.vcd --wave=$@
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.PHONY: clean
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clean:
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rm ${TESTBENCH} ${TESTBENCH}.ghw ${TESTBENCH}.vcd work* *.o
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