Library of reusable VHDL components
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  1. ## Copyright (c) 2014 - 2022 by Torsten Meissner
  2. ##
  3. ## Licensed under the Apache License, Version 2.0 (the "License");
  4. ## you may not use this file except in compliance with the License.
  5. ## You may obtain a copy of the License at
  6. ##
  7. ## https://www.apache.org/licenses/LICENSE-2.0
  8. ##
  9. ## Unless required by applicable law or agreed to in writing, software
  10. ## distributed under the License is distributed on an "AS IS" BASIS,
  11. ## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. ## See the License for the specific language governing permissions and
  13. ## limitations under the License.
  14. [tasks]
  15. bmc
  16. prove
  17. cover
  18. [options]
  19. depth 25
  20. bmc: mode bmc
  21. prove: mode prove
  22. cover: mode cover
  23. [engines]
  24. bmc: smtbmc z3
  25. prove: abc pdr
  26. cover: smtbmc z3
  27. [script]
  28. bmc: ghdl --std=08 -gCoverage=false -gFormal=true -gSimulation=false -gAddressWidth=32 -gDataWidth=32 WishBoneMasterE.vhd -e wishbonemastere
  29. prove: ghdl --std=08 -gCoverage=false -gFormal=true -gSimulation=false -gAddressWidth=32 -gDataWidth=32 WishBoneMasterE.vhd -e wishbonemastere
  30. cover: ghdl --std=08 -gCoverage=true -gFormal=true -gSimulation=false -gAddressWidth=32 -gDataWidth=32 WishBoneMasterE.vhd -e wishbonemastere
  31. prep -auto-top
  32. [files]
  33. ../syn/WishBoneMasterE.vhd