Library of reusable VHDL components
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  1. -- Copyright (c) 2014 - 2022 by Torsten Meissner
  2. --
  3. -- Licensed under the Apache License, Version 2.0 (the "License");
  4. -- you may not use this file except in compliance with the License.
  5. -- You may obtain a copy of the License at
  6. --
  7. -- https://www.apache.org/licenses/LICENSE-2.0
  8. --
  9. -- Unless required by applicable law or agreed to in writing, software
  10. -- distributed under the License is distributed on an "AS IS" BASIS,
  11. -- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. -- See the License for the specific language governing permissions and
  13. -- limitations under the License.
  14. library ieee;
  15. use ieee.std_logic_1164.all;
  16. use ieee.numeric_std.all;
  17. library libvhdl;
  18. use libvhdl.AssertP.all;
  19. library osvvm;
  20. use osvvm.RandomPkg.all;
  21. entity QueueT is
  22. end entity QueueT;
  23. architecture sim of QueueT is
  24. constant C_QUEUE_DEPTH : natural := 64;
  25. package SlvQueue is new libvhdl.QueueP
  26. generic map (
  27. QUEUE_TYPE => std_logic_vector(63 downto 0),
  28. MAX_LEN => C_QUEUE_DEPTH,
  29. to_string => to_hstring
  30. );
  31. shared variable sv_simple_queue : SlvQueue.t_simple_queue;
  32. shared variable sv_list_queue : SlvQueue.t_list_queue;
  33. begin
  34. QueueInitP : process is
  35. begin
  36. sv_simple_queue.init(false);
  37. sv_list_queue.init(false);
  38. wait;
  39. end process QueueInitP;
  40. SimpleQueueTestP : process is
  41. variable v_data : std_logic_vector(63 downto 0);
  42. variable v_random : RandomPType;
  43. begin
  44. -- check initial emptiness
  45. assert_true(sv_simple_queue.is_empty, "Queue should be empty!");
  46. -- Fill queue
  47. v_random.InitSeed(v_random'instance_name);
  48. for i in 0 to C_QUEUE_DEPTH-1 loop
  49. v_data := v_random.RandSlv(64);
  50. sv_simple_queue.push(v_data);
  51. end loop;
  52. -- check that it's full
  53. assert_true(sv_simple_queue.is_full, "Queue should be full!");
  54. -- Check number of entries
  55. assert_equal(sv_simple_queue.fillstate, C_QUEUE_DEPTH, "Queue should have" & integer'image(C_QUEUE_DEPTH) & "entries");
  56. -- empty the queue
  57. v_random.InitSeed(v_random'instance_name);
  58. for i in 0 to C_QUEUE_DEPTH-1 loop
  59. sv_simple_queue.pop(v_data);
  60. assert_equal(v_data, v_random.RandSlv(64));
  61. end loop;
  62. -- check emptiness
  63. assert_true(sv_simple_queue.is_empty, "Queue should be empty!");
  64. report "INFO: t_simple_queue test finished successfully";
  65. wait;
  66. end process SimpleQueueTestP;
  67. ListQueueTestP : process is
  68. variable v_data : std_logic_vector(63 downto 0);
  69. variable v_random : RandomPType;
  70. begin
  71. -- check initial emptiness
  72. assert_true(sv_list_queue.is_empty, "Queue should be empty!");
  73. -- Fill queue
  74. v_random.InitSeed(v_random'instance_name);
  75. for i in 0 to C_QUEUE_DEPTH-1 loop
  76. v_data := v_random.RandSlv(64);
  77. sv_list_queue.push(v_data);
  78. end loop;
  79. -- check that it's full
  80. assert_true(sv_list_queue.is_full, "Queue should be full!");
  81. -- Check number of entries
  82. assert_equal(sv_list_queue.fillstate, C_QUEUE_DEPTH, "Queue should have" & integer'image(C_QUEUE_DEPTH) & "entries");
  83. -- empty the queue
  84. v_random.InitSeed(v_random'instance_name);
  85. for i in 0 to C_QUEUE_DEPTH-1 loop
  86. sv_list_queue.pop(v_data);
  87. assert_equal(v_data, v_random.RandSlv(64));
  88. end loop;
  89. -- check emptiness
  90. assert_true(sv_list_queue.is_empty, "Queue should be empty!");
  91. report "INFO: t_list_queue test finished successfully";
  92. wait;
  93. end process ListQueueTestP;
  94. end architecture sim;