Library of reusable VHDL components
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  1. library ieee;
  2. use ieee.std_logic_1164.all;
  3. use ieee.numeric_std.all;
  4. entity QueueT is
  5. end entity QueueT;
  6. architecture sim of QueueT is
  7. shared variable sv_simple_queue : work.QueueP.t_simple_queue;
  8. shared variable sv_list_queue : work.QueueP.t_list_queue;
  9. begin
  10. SimpleQueueTestP : process is
  11. variable v_data : std_logic_vector(63 downto 0);
  12. variable v_count : natural := 0;
  13. begin
  14. -- check initial emptiness
  15. assert sv_simple_queue.is_empty
  16. report "ERROR: queue should be empty!"
  17. severity failure;
  18. for i in 0 to 63 loop
  19. sv_simple_queue.push(std_logic_vector(to_unsigned(v_count, 64)));
  20. v_count := v_count + 1;
  21. end loop;
  22. -- check that it's full
  23. assert sv_simple_queue.is_full
  24. report "ERROR: queue should be full!"
  25. severity failure;
  26. -- empty the queue
  27. v_count := 0;
  28. for i in 0 to 63 loop
  29. sv_simple_queue.pop(v_data);
  30. assert v_data = std_logic_vector(to_unsigned(v_count, 64))
  31. report "ERROR: read data should be " & integer'image(v_count) &
  32. " instead of " & integer'image(to_integer(unsigned(v_data)))
  33. severity failure;
  34. v_count := v_count + 1;
  35. end loop;
  36. -- check emptiness
  37. assert sv_simple_queue.is_empty
  38. report "ERROR: queue should be empty!"
  39. severity failure;
  40. report "INFO: t_simple_queue test finished successfully";
  41. wait;
  42. end process SimpleQueueTestP;
  43. ListQueueTestP : process is
  44. variable v_data : std_logic_vector(63 downto 0);
  45. variable v_count : natural := 0;
  46. begin
  47. -- check initial emptiness
  48. assert sv_list_queue.is_empty
  49. report "ERROR: queue should be empty!"
  50. severity failure;
  51. for i in 0 to 63 loop
  52. sv_list_queue.push(std_logic_vector(to_unsigned(v_count, 64)));
  53. v_count := v_count + 1;
  54. end loop;
  55. -- check that it's full
  56. assert sv_list_queue.is_full
  57. report "ERROR: queue should be full!"
  58. severity failure;
  59. -- empty the queue
  60. v_count := 0;
  61. for i in 0 to 63 loop
  62. sv_list_queue.pop(v_data);
  63. assert v_data = std_logic_vector(to_unsigned(v_count, 64))
  64. report "ERROR: read data should be " & integer'image(v_count) &
  65. " instead of " & integer'image(to_integer(unsigned(v_data)))
  66. severity failure;
  67. v_count := v_count + 1;
  68. end loop;
  69. -- check emptiness
  70. assert sv_list_queue.is_empty
  71. report "ERROR: queue should be empty!"
  72. severity failure;
  73. report "INFO: t_list_queue test finished successfully";
  74. wait;
  75. end process ListQueueTestP;
  76. end architecture sim;