14 Commits (76f15e8c7654f7a7cad1910dbb6e78660a24f7d3)

Author SHA1 Message Date
  T. Meissner 76f15e8c76 integrate VHDL-08 libraries 10 years ago
  T. Meissner 5dd42b80a2 add synthesizable and configurable SPI master component and enhance unit test 10 years ago
  T. Meissner c9fc7388c9 add synthesizable configurable SPI slave component and unit test 10 years ago
  T. Meissner ac5925c717 add synthesizable configurable SPI slave component and unit test 10 years ago
  T. Meissner 389b3470f1 add cpha parameter do spi_master & spi_slave; change unit test to check all combinations of cpol & cpha 10 years ago
  T. Meissner 58478fa5f0 add new SimP package with various general useful testbench procedures like spi master & slave 10 years ago
  T. Meissner 990a511776 compile all packages in library 'libvhdl' now & use the library in the testbenches 10 years ago
  T. Meissner e70325aa62 use new overloaded procedures with added report string parameter 10 years ago
  T. Meissner 1314da2738 add StringP & AssertP source files to Queuet target 10 years ago
  T. Meissner b02ec5e6b5 replaced assert statements by procedures defined in AssertP package 10 years ago
  T. Meissner 97b6596e83 add test for ascending slv; add info about successfully finished simulation 10 years ago
  T. Meissner fe2e5a5c7e added new StringP (string conversion functions) and unit test for it 10 years ago
  T. Meissner faac81128b removed useless v_count variable and replaced it by using i loop variable 10 years ago
  T. Meissner 1b9408fda2 added new queue t_list_queue, implemented as linked list 10 years ago
  T. Meissner f4d72942b0 initial commit of simple queue design file & testbench 10 years ago