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libvhdl
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3 Commits (98d699202029133994102ed22ca7696ccdabf054)

Author SHA1 Message Date
  T. Meissner c1005badfc Add PSL assertions to check initiating of WishBone write/read transfer 9 years ago
  T. Meissner 285a25132e react to slave ack in ADDRESS state 10 years ago
  T. Meissner 7d60f0ae1b add simple wishbone master and slave with support of classic single write and read as specified in the wishbone spec b4; add unit tests for wishbone m,aster & slave 10 years ago