5 Commits (a482c1209a911cfa437431b82f89ab3ca32fd770)

Author SHA1 Message Date
  T. Meissner 652e9b6a2a Add uint_bitsize() function 9 years ago
  T. Meissner 28383d2ae0 Add monitor to check master initiated WishBone transfers 9 years ago
  T. Meissner f9361cc0d0 Outcomment VHDL-08 proposal library including & uses 9 years ago
  T. Meissner 500f41f4b7 add init() procedure to t_list_queue type to configure the maximal depth of the linked-list queue 10 years ago
  T. Meissner 7d60f0ae1b add simple wishbone master and slave with support of classic single write and read as specified in the wishbone spec b4; add unit tests for wishbone m,aster & slave 10 years ago